glam/features/
impl_bytemuck.rs

1#[cfg(target_arch = "spirv")]
2mod spirv {
3    use crate::{
4        Affine2, Affine3A, DAffine2, DAffine3, DMat2, DMat3, DMat4, DQuat, DVec2, DVec3, DVec4,
5        I16Vec2, I16Vec3, I16Vec4, I64Vec2, I64Vec3, I64Vec4, I8Vec2, I8Vec3, I8Vec4, IVec2, IVec3,
6        IVec4, Mat2, Mat3, Mat3A, Mat4, Quat, U16Vec2, U16Vec3, U16Vec4, U64Vec2, U64Vec3, U64Vec4,
7        U8Vec2, U8Vec3, U8Vec4, UVec2, UVec3, UVec4, Vec2, Vec3, Vec3A, Vec4,
8    };
9    use bytemuck::{AnyBitPattern, Pod, Zeroable};
10
11    // Affine2 contains internal padding due to Mat2 using SIMD
12    unsafe impl AnyBitPattern for Affine2 {}
13    unsafe impl Zeroable for Affine2 {}
14    unsafe impl AnyBitPattern for Affine3A {}
15    unsafe impl Zeroable for Affine3A {}
16
17    unsafe impl Pod for Mat2 {}
18    unsafe impl Zeroable for Mat2 {}
19    unsafe impl Pod for Mat3 {}
20    unsafe impl Zeroable for Mat3 {}
21    unsafe impl AnyBitPattern for Mat3A {}
22    unsafe impl Zeroable for Mat3A {}
23    unsafe impl Pod for Mat4 {}
24    unsafe impl Zeroable for Mat4 {}
25
26    unsafe impl Pod for Quat {}
27    unsafe impl Zeroable for Quat {}
28
29    unsafe impl Pod for Vec2 {}
30    unsafe impl Zeroable for Vec2 {}
31    unsafe impl Pod for Vec3 {}
32    unsafe impl Zeroable for Vec3 {}
33    unsafe impl AnyBitPattern for Vec3A {}
34    unsafe impl Zeroable for Vec3A {}
35    unsafe impl Pod for Vec4 {}
36    unsafe impl Zeroable for Vec4 {}
37
38    unsafe impl Pod for DAffine2 {}
39    unsafe impl Zeroable for DAffine2 {}
40    unsafe impl Pod for DAffine3 {}
41    unsafe impl Zeroable for DAffine3 {}
42
43    unsafe impl Pod for DMat2 {}
44    unsafe impl Zeroable for DMat2 {}
45    unsafe impl Pod for DMat3 {}
46    unsafe impl Zeroable for DMat3 {}
47    unsafe impl Pod for DMat4 {}
48    unsafe impl Zeroable for DMat4 {}
49
50    unsafe impl Pod for DQuat {}
51    unsafe impl Zeroable for DQuat {}
52
53    unsafe impl Pod for DVec2 {}
54    unsafe impl Zeroable for DVec2 {}
55    unsafe impl Pod for DVec3 {}
56    unsafe impl Zeroable for DVec3 {}
57    unsafe impl Pod for DVec4 {}
58    unsafe impl Zeroable for DVec4 {}
59
60    unsafe impl Pod for I8Vec2 {}
61    unsafe impl Zeroable for I8Vec2 {}
62    unsafe impl Pod for I8Vec3 {}
63    unsafe impl Zeroable for I8Vec3 {}
64    unsafe impl Pod for I8Vec4 {}
65    unsafe impl Zeroable for I8Vec4 {}
66
67    unsafe impl Pod for U8Vec2 {}
68    unsafe impl Zeroable for U8Vec2 {}
69    unsafe impl Pod for U8Vec3 {}
70    unsafe impl Zeroable for U8Vec3 {}
71    unsafe impl Pod for U8Vec4 {}
72    unsafe impl Zeroable for U8Vec4 {}
73
74    unsafe impl Pod for I16Vec2 {}
75    unsafe impl Zeroable for I16Vec2 {}
76    unsafe impl Pod for I16Vec3 {}
77    unsafe impl Zeroable for I16Vec3 {}
78    unsafe impl Pod for I16Vec4 {}
79    unsafe impl Zeroable for I16Vec4 {}
80
81    unsafe impl Pod for U16Vec2 {}
82    unsafe impl Zeroable for U16Vec2 {}
83    unsafe impl Pod for U16Vec3 {}
84    unsafe impl Zeroable for U16Vec3 {}
85    unsafe impl Pod for U16Vec4 {}
86    unsafe impl Zeroable for U16Vec4 {}
87
88    unsafe impl Pod for IVec2 {}
89    unsafe impl Zeroable for IVec2 {}
90    unsafe impl Pod for IVec3 {}
91    unsafe impl Zeroable for IVec3 {}
92    unsafe impl Pod for IVec4 {}
93    unsafe impl Zeroable for IVec4 {}
94
95    unsafe impl Pod for UVec2 {}
96    unsafe impl Zeroable for UVec2 {}
97    unsafe impl Pod for UVec3 {}
98    unsafe impl Zeroable for UVec3 {}
99    unsafe impl Pod for UVec4 {}
100    unsafe impl Zeroable for UVec4 {}
101
102    unsafe impl Pod for I64Vec2 {}
103    unsafe impl Zeroable for I64Vec2 {}
104    unsafe impl Pod for I64Vec3 {}
105    unsafe impl Zeroable for I64Vec3 {}
106    unsafe impl Pod for I64Vec4 {}
107    unsafe impl Zeroable for I64Vec4 {}
108
109    unsafe impl Pod for U64Vec2 {}
110    unsafe impl Zeroable for U64Vec2 {}
111    unsafe impl Pod for U64Vec3 {}
112    unsafe impl Zeroable for U64Vec3 {}
113    unsafe impl Pod for U64Vec4 {}
114    unsafe impl Zeroable for U64Vec4 {}
115}
116
117#[cfg(test)]
118mod test {
119    use crate::{
120        Affine2, Affine3A, DAffine2, DAffine3, DMat2, DMat3, DMat4, DQuat, DVec2, DVec3, DVec4,
121        I16Vec2, I16Vec3, I16Vec4, I64Vec2, I64Vec3, I64Vec4, I8Vec2, I8Vec3, I8Vec4, IVec2, IVec3,
122        IVec4, Mat2, Mat3, Mat3A, Mat4, Quat, U16Vec2, U16Vec3, U16Vec4, U64Vec2, U64Vec3, U64Vec4,
123        U8Vec2, U8Vec3, U8Vec4, UVec2, UVec3, UVec4, Vec2, Vec3, Vec3A, Vec4,
124    };
125    use core::mem;
126
127    macro_rules! test_pod_t {
128        ($name:ident, $t:ty) => {
129            #[test]
130            fn $name() {
131                let t = <$t>::default();
132                let b = bytemuck::bytes_of(&t);
133                // the below loop will fail in miri if we're doing something bad here.
134                for bi in b {
135                    assert_eq!(bi, bi);
136                }
137                // should be the same address
138                assert_eq!(&t as *const $t as usize, b.as_ptr() as usize);
139                // should be the same size
140                assert_eq!(b.len(), mem::size_of_val(&t));
141            }
142        };
143    }
144
145    macro_rules! test_any_bit_pattern_t {
146        ($name:ident, $t:ident) => {
147            #[test]
148            fn $name() {
149                let b = [0_u8; mem::size_of::<$t>()];
150                let t: $t = bytemuck::cast(b);
151                // should be the same size
152                assert_eq!(b.len(), mem::size_of_val(&t));
153                // should be zero
154                assert_eq!(t, $t::ZERO);
155            }
156        };
157    }
158
159    test_any_bit_pattern_t!(affine2, Affine2);
160    test_any_bit_pattern_t!(affine3a, Affine3A);
161    test_pod_t!(mat2, Mat2);
162    test_pod_t!(mat3, Mat3);
163    test_any_bit_pattern_t!(mat3a, Mat3A);
164    test_pod_t!(mat4, Mat4);
165    test_pod_t!(quat, Quat);
166    test_pod_t!(vec2, Vec2);
167    test_pod_t!(vec3, Vec3);
168    test_any_bit_pattern_t!(vec3a, Vec3A);
169    test_pod_t!(vec4, Vec4);
170
171    test_pod_t!(daffine2, DAffine2);
172    test_pod_t!(daffine3, DAffine3);
173    test_pod_t!(dmat2, DMat2);
174    test_pod_t!(dmat3, DMat3);
175    test_pod_t!(dmat4, DMat4);
176    test_pod_t!(dquat, DQuat);
177    test_pod_t!(dvec2, DVec2);
178    test_pod_t!(dvec3, DVec3);
179    test_pod_t!(dvec4, DVec4);
180
181    test_pod_t!(i8vec2, I8Vec2);
182    test_pod_t!(i8vec3, I8Vec3);
183    test_pod_t!(i8vec4, I8Vec4);
184
185    test_pod_t!(u8vec2, U8Vec2);
186    test_pod_t!(u8vec3, U8Vec3);
187    test_pod_t!(u8vec4, U8Vec4);
188
189    test_pod_t!(i16vec2, I16Vec2);
190    test_pod_t!(i16vec3, I16Vec3);
191    test_pod_t!(i16vec4, I16Vec4);
192
193    test_pod_t!(u16vec2, U16Vec2);
194    test_pod_t!(u16vec3, U16Vec3);
195    test_pod_t!(u16vec4, U16Vec4);
196
197    test_pod_t!(ivec2, IVec2);
198    test_pod_t!(ivec3, IVec3);
199    test_pod_t!(ivec4, IVec4);
200
201    test_pod_t!(uvec2, UVec2);
202    test_pod_t!(uvec3, UVec3);
203    test_pod_t!(uvec4, UVec4);
204
205    test_pod_t!(i64vec2, I64Vec2);
206    test_pod_t!(i64vec3, I64Vec3);
207    test_pod_t!(i64vec4, I64Vec4);
208
209    test_pod_t!(u64vec2, U64Vec2);
210    test_pod_t!(u64vec3, U64Vec3);
211    test_pod_t!(u64vec4, U64Vec4);
212}